66.12.3.2 SMC IOSET2 Write Timings

Table 66-50. SMC IOSET2 Write Signals - NWE Controlled (WRITE_MODE = 1)
SymbolParameterMinUnit
Power supply1.8V3.3V
HOLD or NO HOLD SETTINGS (nwe hold ≠ 0, nwe hold = 0)
SMC15Data Out Valid before NWE Highnwe pulse  ×  tCPMCKnwe pulse  ×  tCPMCKns
SMC16NWE Pulse Widthnwe pulse  ×  tCPMCKnwe pulse  ×  tCPMCKns
SMC17NBS0/A0 NBS1, NBS2/A1, NBS3, A2–A25 valid before NWE lownwe setup  ×  tCPMCKnwe pulse  ×  tCPMCKns
SMC18NCS low before NWE high(nwe setup - ncs rd setup + nwe pulse)  ×  tCPMCK(nwe setup - ncs rd setup + nwe pulse)  ×  tCPMCKns
HOLD SETTINGS (nwe hold ≠ 0)
SMC19NWE High to Data OUT, NBS0/A0 NBS1, NBS2/A1, NBS3, A2–A25 changenwe hold  ×  tCPMCKnwe hold  ×  tCPMCKns
SMC20NWE High to NCS Inactive(1)(nwe hold - ncs wr hold) ×  tCPMCK(nwe hold - ncs wr hold) ×  tCPMCKns
NO HOLD SETTINGS (nwe hold = 0)
SMC21NWE High to Data OUT, NBS0/A0 NBS1, NBS2/A1, NBS3, A2–A25, NCS change(1)1.20.6ns
Note: hold length = total cycle duration - setup duration - pulse duration. “hold length” is for “ncs wr hold length” or “NWE hold length”.
Table 66-51. SMC IOSET2 Write NCS Controlled (WRITE_MODE = 0)
SymbolParameterMinUnit
Power supply1.8V3.3V
SMC22Data Out Valid before NCS Highncs wr pulse × tCPMCKncs wr pulse × tCPMCKns
SMC23NCS Pulse WidthSMC14SMC14ns
SMC24NBS0/A0 NBS1, NBS2/A1, NBS3, A2–A25 valid before NCS lowncs wr setup × tCPMCKncs wr setup × tCPMCKns
SMC25NWE low before NCS high(ncs wr setup - nwe setup + ncs pulse) × tCPMCK(ncs wr setup - nwe setup + ncs pulse) × tCPMCKns
SMC26NCS High to Data Out, NBS0/A0, NBS1, NBS2/A1, NBS3, A2–A25, changencs wr hold × tCPMCKncs wr hold × tCPMCKns
SMC27NCS High to NWE Inactive(ncs wr hold - nwe hold) × tCPMCK(ncs wr hold - nwe hold) × tCPMCKns
Figure 66-10. SMC Timings - NCS Controlled Read and Write
Figure 66-11. SMC Timings - NRD Controlled Read and NWE Controlled Write