48.7.3.2 Host Mode Flow Diagram

Figure 48-7. Host Mode Flow Diagram

The figure below shows the behavior of Transmit Data Register Empty (TDRE), Receive Data Register (RDRF) and Transmission Register Empty (TXEMPTY) status flags within SPI_SR during an 8-bit data transfer in Fixed mode without the DMA involved.

Figure 48-8. Status Register Flags Behavior