SAMA5D2 Series

66.18.2 DDR2-SDRAM

Note: For DDR2 memory, the SHIFT_SAMPLING field value in the MPRDDRC_RD_DATA_PATH register must be configured to 1.

Table 66-77. System Clock Waveform Parameters
Symbol	Parameter	Conditions	Min	Max	Unit
t_DDRCK	DDRCK Cycle Time	VDDCORE[1.1V, 1.32V]	7.5	8.0	ns
t_DDRCK	DDRCK Cycle Time	VDDCORE[1.2V, 1.32V], VDDIODDR[1.8V, 1.9V]	6.0	8.0	ns

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