45.2 Embedded Characteristics

  • 2 TWIHSs
  • 16-byte Transmit and Receive FIFOs
  • Compatible with Two-wire Interface Serial Memory and I²C Compatible Devices(1)
  • One, Two or Three Bytes for Client Address
  • Sequential Read/Write Operations
  • Host and Multi-Host Operation (Standard and Fast Modes Only)
  • Client Mode Operation (Standard, Fast and High-Speed Modes)
  • Bit Rate: Up to 400 Kbit/s in Fast Mode and 3.4 Mbit/s in High-Speed Mode (Client Mode Only)
  • General Call Supported in Client Mode
  • Asynchronous Partial Wake-up
  • SMBus Support
  • Connection to DMA Controller (DMA) Channel Capabilities Optimizes Data Transfers
  • Register Write Protection
Note:

See TWI Compatibility with I2C Standard for details on compatibility with I²C Standard.