23.4.2.1 NRST Signal or Interrupt

The NRST manager samples the NRST pin at 32 kHz. When the line is detected low, a user reset is reported to the reset state manager.

However, the NRST manager can be programmed to not trigger a reset when an assertion of NRST occurs. Writing a zero to RSTC_MR.URSTEN disables the user reset trigger.

The level of the pin NRST can be read at any time in the bit NRSTL (NRST level) in the Status register (RSTC_SR). As soon as the pin NRST is asserted, RSTC_SR.URSTS is set. This bit clears only when RSTC_SR is read.

The RSTC can also be programmed to generate an interrupt instead of generating a reset. To do so, RSTC_MR.URSTIEN must be set.