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Ultra-Low-Power Arm® Cortex®-A5 Core-Based MPU, 500 MHz, Graphics Interface, Ethernet 10/100, CAN, USB, PCI 5.0 Pre-Certified SAMA5D2 Series
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66
Electrical Characteristics
66.13
FLEXCOM Timings
66.13.1
FLEXCOM USART in Asynchronous Modes
SAMA5D2 Series
Introduction
Features
Description
1
Configuration Summary
2
Block Diagram
3
Signal Description
4
Microchip Recommended Power Management Solutions
5
Safety and Security Features
6
Package and Pinout
7
Power Considerations
8
Memories
9
Event System
10
System Controller
11
Peripherals
12
Chip Identifier (CHIPID)
13
Cortex-A5 Processor (ARM)
14
L2 Cache Controller (L2CC)
15
Debug and Test Features
16
Standard Boot Strategies
17
CPU System Bus Matrix (CPUMX)
18
Matrix (H64MX/H32MX)
19
Special Function Registers (SFR)
20
Special Function Registers Backup (SFRBU)
21
Advanced Interrupt Controller (AIC)
22
Watchdog Timer (WDT)
23
Reset Controller (RSTC)
24
Shutdown Controller (SHDWC)
25
Periodic Interval Timer (PIT)
26
Real-time Clock (RTC)
27
System Controller Write Protection (SYSCWP)
28
Slow Clock Controller (SCKC)
29
Peripheral Touch Controller (PTC)
30
Low Power Asynchronous Receiver (RXLP)
31
Clock Generator
32
Power Management Controller (PMC)
33
Parallel Input/Output Controller (PIO)
34
External Memories
35
DDR-SDRAM Controller (MPDDRC)
36
Static Memory Controller (SMC)
37
DMA Controller (XDMAC)
38
LCD Controller (LCDC)
39
Ethernet MAC (GMAC)
40
USB Device High Speed Port (UDPHS)
41
USB Host High Speed Port (UHPHS)
42
Audio Class D Amplifier (CLASSD)
43
Inter-IC Sound Controller (I2SC)
44
Synchronous Serial Controller (SSC)
45
Two-wire Interface (TWIHS)
46
Flexible Serial Communication Controller (FLEXCOM)
47
Universal Asynchronous Receiver Transmitter (UART)
48
Serial Peripheral Interface (SPI)
49
Quad Serial Peripheral Interface (QSPI)
50
Secure Digital MultiMedia Card Controller (SDMMC)
51
Image Sensor Controller (ISC)
52
Controller Area Network (MCAN)
53
Timer Counter (TC)
54
Pulse Density Modulation Interface Controller (PDMIC)
55
Pulse Width Modulation Controller (PWM)
56
Secure Fuse Controller (SFC)
57
Integrity Check Monitor (ICM)
58
Advanced Encryption Standard Bridge (AESB)
59
Advanced Encryption Standard (AES)
60
Secure Hash Algorithm (SHA)
61
Triple Data Encryption Standard (TDES)
62
True Random Number Generator (TRNG)
63
Analog Comparator Controller (ACC)
64
Security Module (SECUMOD)
65
Analog-to-Digital Controller (ADC)
66
Electrical Characteristics
66.1
Absolute Maximum Ratings
66.2
DC Characteristics
66.3
Power Consumption
66.4
Clock Characteristics
66.5
Oscillator Characteristics
66.6
PLL Characteristics
66.7
USB HS Characteristics
66.8
PTC Characteristics
66.9
ADC Characteristics
66.10
Analog Comparator Characteristics
66.11
POR Characteristics
66.12
SMC Timings
66.13
FLEXCOM Timings
66.13.1
FLEXCOM USART in Asynchronous Modes
66.13.2
FLEXCOM SPI Timings
66.13.3
FLEXCOM TWI Timings
66.14
USART in Asynchronous Modes
66.15
SPI Timings
66.16
TWI Timings
66.17
QSPI Timings
66.18
MPDDRC Timings
66.19
SSC Timings
66.20
PDMIC Timings
66.21
I2SC Timings
66.22
ISC Timings
66.23
SDMMC Timings
66.24
GMAC Timings
67
Mechanical Characteristics
68
Marking
69
Ordering Information
70
Revision History
Microchip Information
66.13.1 FLEXCOM USART in Asynchronous Modes
Refer to the section
USART in Asynchronous Modes
.
