40.3 UDPHS Interrupt Enable Register
| Name: | UDPHS_IEN |
| Offset: | 0x10 |
| Reset: | 0x00000010 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| DMA_7 | DMA_6 | DMA_5 | DMA_4 | DMA_3 | DMA_2 | DMA_1 | |||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| EPT_15 | EPT_14 | EPT_13 | EPT_12 | EPT_11 | EPT_10 | EPT_9 | EPT_8 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| EPT_7 | EPT_6 | EPT_5 | EPT_4 | EPT_3 | EPT_2 | EPT_1 | EPT_0 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| UPSTR_RES | ENDOFRSM | WAKE_UP | ENDRESET | INT_SOF | MICRO_SOF | DET_SUSPD | |||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
Bits 25, 26, 27, 28, 29, 30, 31 – DMA_x DMA Channel x Interrupt Enable (cleared upon USB reset)
| Value | Description |
|---|---|
| 0 | Disable the interrupts for this channel. |
| 1 | Enable the interrupts for this channel. |
Bits 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23 – EPT_x Endpoint x Interrupt Enable (cleared upon USB reset)
| Value | Description |
|---|---|
| 0 | Disable the interrupts for this endpoint. |
| 1 | Enable the interrupts for this endpoint. |
Bit 7 – UPSTR_RES Upstream Resume Interrupt Enable (cleared upon USB reset)
| Value | Description |
|---|---|
| 0 | Disable Upstream Resume Interrupt. |
| 1 | Enable Upstream Resume Interrupt. |
Bit 6 – ENDOFRSM End Of Resume Interrupt Enable (cleared upon USB reset)
| Value | Description |
|---|---|
| 0 | Disable Resume Interrupt. |
| 1 | Enable Resume Interrupt. |
Bit 5 – WAKE_UP Wake Up CPU Interrupt Enable (cleared upon USB reset)
| Value | Description |
|---|---|
| 0 | Disable Wake-up CPU Interrupt. |
| 1 | Enable Wake-up CPU Interrupt. |
Bit 4 – ENDRESET End Of Reset Interrupt Enable (cleared upon USB reset)
| Value | Description |
|---|---|
| 0 | Disable End Of Reset Interrupt. |
| 1 | Enable End Of Reset Interrupt. Automatically enabled after USB reset. |
Bit 3 – INT_SOF SOF Interrupt Enable (cleared upon USB reset)
| Value | Description |
|---|---|
| 0 | Disable SOF Interrupt. |
| 1 | Enable SOF Interrupt. |
Bit 2 – MICRO_SOF Micro-SOF Interrupt Enable (cleared upon USB reset)
| Value | Description |
|---|---|
| 0 | Disable Micro-SOF Interrupt. |
| 1 | Enable Micro-SOF Interrupt. |
Bit 1 – DET_SUSPD Suspend Interrupt Enable (cleared upon USB reset)
| Value | Description |
|---|---|
| 0 | Disable Suspend Interrupt. |
| 1 | Enable Suspend Interrupt. |