40.3 UDPHS Interrupt Enable Register

Name: UDPHS_IEN
Offset: 0x10
Reset: 0x00000010
Property: Read/Write

Bit 3130292827262524 
 DMA_7DMA_6DMA_5DMA_4DMA_3DMA_2DMA_1  
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 
Bit 2322212019181716 
 EPT_15EPT_14EPT_13EPT_12EPT_11EPT_10EPT_9EPT_8 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 EPT_7EPT_6EPT_5EPT_4EPT_3EPT_2EPT_1EPT_0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 UPSTR_RESENDOFRSMWAKE_UPENDRESETINT_SOFMICRO_SOFDET_SUSPD  
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0001000 

Bits 25, 26, 27, 28, 29, 30, 31 – DMA_x DMA Channel x Interrupt Enable (cleared upon USB reset)

ValueDescription
0 Disable the interrupts for this channel.
1 Enable the interrupts for this channel.

Bits 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23 – EPT_x Endpoint x Interrupt Enable (cleared upon USB reset)

ValueDescription
0 Disable the interrupts for this endpoint.
1 Enable the interrupts for this endpoint.

Bit 7 – UPSTR_RES Upstream Resume Interrupt Enable (cleared upon USB reset)

ValueDescription
0 Disable Upstream Resume Interrupt.
1 Enable Upstream Resume Interrupt.

Bit 6 – ENDOFRSM End Of Resume Interrupt Enable (cleared upon USB reset)

ValueDescription
0 Disable Resume Interrupt.
1 Enable Resume Interrupt.

Bit 5 – WAKE_UP Wake Up CPU Interrupt Enable (cleared upon USB reset)

ValueDescription
0 Disable Wake-up CPU Interrupt.
1 Enable Wake-up CPU Interrupt.

Bit 4 – ENDRESET End Of Reset Interrupt Enable (cleared upon USB reset)

ValueDescription
0 Disable End Of Reset Interrupt.
1 Enable End Of Reset Interrupt. Automatically enabled after USB reset.

Bit 3 – INT_SOF SOF Interrupt Enable (cleared upon USB reset)

ValueDescription
0 Disable SOF Interrupt.
1 Enable SOF Interrupt.

Bit 2 – MICRO_SOF Micro-SOF Interrupt Enable (cleared upon USB reset)

ValueDescription
0 Disable Micro-SOF Interrupt.
1 Enable Micro-SOF Interrupt.

Bit 1 – DET_SUSPD Suspend Interrupt Enable (cleared upon USB reset)

ValueDescription
0 Disable Suspend Interrupt.
1 Enable Suspend Interrupt.