38.7.31 Base Layer Configuration Register 4
Name: | LCDC_BASECFG4 |
Offset: | 0x0000007C |
Reset: | 0x00000000 |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
DISCEN | REP | DMA | |||||||
Access | R/W | R/W | R/W | ||||||
Reset | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
Access | |||||||||
Reset |
Bit 11 – DISCEN Discard Area Enable
Value | Description |
---|---|
0 | The whole frame is retrieved from memory. |
1 | The DMA channel discards the area located at screen coordinate {DISCXPOS, DISCYPOS}. |
Bit 9 – REP Use Replication logic to expand RGB color to 24 bits
Value | Description |
---|---|
0 | When the selected pixel depth is less than 24 bpp the pixel is shifted and least significant bits are set to 0. |
1 | When the selected pixel depth is less than 24 bpp the pixel is shifted and the least significant bit replicates the msb. |
Bit 8 – DMA Use DMA Data Path
Value | Description |
---|---|
0 | The default color is used on the Base Layer. |
1 | The DMA channel retrieves the pixels stream from the memory. |