17.5.1 CPU System Bus Matrix Remap Register
| Name: | AXIMX_REMAP |
| Offset: | 0x00 |
| Reset: | – |
| Property: | Write-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| REMAP0 | |||||||||
| Access | W | ||||||||
| Reset | – |
Bit 0 – REMAP0 Remap State 0
SRAM is seen at address 0x00000000 (through Peripheral System Bus Client interface) instead of ROM.