35.5.3.3 Adjust Auto-Refresh Rate

The low-power DDR2-SDRAM and low-power DDR3-SDRAM embeds an internal register, Mode register 19 (Refresh mode). The content of this register allows to adjust the interval of auto-refresh operations according to temperature variation. This feature is activated by setting the Adjust Refresh bit [ADJ_REF] to 1 in the MPDDRC_RTR (see MPDDRC Refresh Timer Register). When this feature is enabled, a Mode Register Read (MRR) command is performed every 16 × t_REFI (average time between REFRESH commands). Depending on the read value, the auto-refresh interval will be modified. In case of high temperature, the interval is reduced and in case of low temperature, the interval is increased.