28.4 Functional Description

The OSCSEL bit is located in the Slow Clock Controller Configuration register (SCKC_CR), in the backup domain, and its value is maintained while VDDBU is present.

The embedded always-on 64 kHz (typical) slow RC oscillator and the 32.768 kHz crystal oscillator are always enabled as soon as VDDBU is established. The Slow Clock Selector command (OSCSEL bit) selects the slow clock source of the RTC.

After the VDDBU power-on reset, the default configuration is OSCSEL = 0, allowing the system to start on the embedded 64 kHz (typical) slow RC oscillator.

The programmer controls the slow clock switching by software, so precautions must be taken during the switching phase.