39.44 GMAC PTP Event Frame Transmitted Seconds High Register

Name: GMAC_EFTSH
Offset: 0x0E8
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
 RUD[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 RUD[7:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 15:0 – RUD[15:0] Register Update

The register is updated with the value that the 1588 timer seconds register held when the SFD of a PTP transmit primary event crosses the MII interface. An interrupt is issued when the register is updated.