SAMA5D2 Series

32.22.15 PMC Interrupt Disable Register

The following configuration values are valid for all listed bit names of this register:

0: No effect

1: Disables the corresponding interrupt

Name:	PMC_IDR
Offset:	0x0064
Reset:	–
Property:	Write-only


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
			XT32KERR			CFDEV	MOSCRCS	MOSCSELS
Access			W			W	W	W
Reset			–			–	–	–


Bit	15	14	13	12	11	10	9	8
						PCKRDY2	PCKRDY1	PCKRDY0
Access						W	W	W
Reset						–	–	–


Bit	7	6	5	4	3	2	1	0
		LOCKU			MCKRDY		LOCKA	MOSCXTS
Access		W			W		W	W
Reset		–			–		–	–

Bit 21 – XT32KERR 32.768 kHz Crystal Oscillator Error Interrupt Disable

Bit 18 – CFDEV Clock Failure Detector Event Interrupt Disable

Bit 17 – MOSCRCS 12 MHz RC Oscillator Status Interrupt Disable

Bit 16 – MOSCSELS Main Oscillator Clock Source Selection Status Interrupt Disable

Bits 8, 9, 10 – PCKRDYx Programmable Clock Ready x Interrupt Disable

Bit 6 – LOCKU UTMI PLL Lock Interrupt Enable

Bit 3 – MCKRDY Main System Bus Clock Ready Interrupt Disable

Bit 1 – LOCKA PLLA Lock Interrupt Disable

Bit 0 – MOSCXTS 8 to 24 MHz Crystal Oscillator Status Interrupt Disable

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.