58.5.2 AESB Mode Register
Name: | AESB_MR |
Offset: | 0x04 |
Reset: | 0x00000000 |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
CKEY[3:0] | |||||||||
Access | W | W | W | W | |||||
Reset | 0 | 0 | 0 | – |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
LOD | OPMOD[2:0] | SMOD[1:0] | |||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
PROCDLY[3:0] | DUALBUFF | AAHB | CIPHER | ||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 23:20 – CKEY[3:0] Key
Value | Name | Description |
---|---|---|
0xE | PASSWD | Must be written with 0xE the first time that AESB_MR is programmed. For subsequent programming of the AESB_MR, any value can be written, including that of 0xE. Always reads as 0. |
Bit 15 – LOD Last Output Data Mode
Value | Description |
---|---|
0 | No effect. After each end of encryption/decryption, the output data will be available either on the output data registers (Manual and Auto modes). In Manual and Auto modes, AESB_ISR.DATRDY is cleared when at least one of the Output Data registers is read. |
1 | AESB_ISR.DATRDY is cleared when at least one of the Input Data registers is written. No additional Output Data register reads are necessary between consecutive encryptions/decryptions (see Last Output Data Mode). |
Bits 14:12 – OPMOD[2:0] Operating Mode
Values which are not listed in the table must be considered as “reserved”.
For CBC-MAC operating mode, configure OPMOD to 0x1 (CBC) and set LOD to 1.
If OPMOD is set to 4 and AAHB = 1, there is no compliance with the standard CTR mode of operation.
Value | Name | Description |
---|---|---|
0 | ECB | Electronic Code Book mode |
1 | CBC | Cipher Block Chaining mode |
2 | – | Reserved |
3 | – | Reserved |
4 | CTR | Counter mode (16-bit internal counter) |
Bits 9:8 – SMOD[1:0] Start Mode
Value | Name | Description |
---|---|---|
0 | MANUAL_START | Manual mode |
1 | AUTO_START | Auto mode |
2 | IDATAR0_START | AESB_IDATAR0 access only Auto mode |
Bits 7:4 – PROCDLY[3:0] Processing Delay
Processing Time = 12 × (PROCDLY + 1)
The Processing Time represents the number of clock cycles that the AESB needs in order to perform one encryption/decryption .
Bit 3 – DUALBUFF Dual Input Buffer
Value | Name | Description |
---|---|---|
0 | INACTIVE | AESB_IDATARx cannot be written during processing of previous block. |
1 | ACTIVE | AESB_IDATARx can be written during processing of previous block when SMOD = 2. It speeds up the overall runtime of large files. |
Bit 2 – AAHB Automatic Bridge Mode
Value | Description |
---|---|
0 | Automatic Bridge mode disabled. |
1 | Automatic Bridge mode enabled. |
Bit 0 – CIPHER Processing Mode
Value | Description |
---|---|
0 | Decrypts data. |
1 | Encrypts data. |