36.4 I/O Lines Description
| Name | Description | Type | Active Level |
|---|---|---|---|
| NCS[3:0] | Static Memory Controller Chip Select Lines | Output | Low |
| NRD | Read Signal | Output | Low |
| NWR0/NWE | Write 0/Write Enable Signal | Output | Low |
| A0/NBS0 | Address Bit 0/Byte 0 Select Signal | Output | Low |
| NWR1/NBS1 | Write 1/Byte 1 Select Signal | Output | Low |
| A[25:1] | Address Bus | Output | – |
| D[15:0] | Data Bus | I/O | – |
| NWAIT | External Wait Signal | Input | Low |
| NANDRDY | NAND Flash Ready/Busy | Input | – |
| NANDWE | NAND Flash Write Enable | Output | Low |
| NANDOE | NAND Flash Output Enable | Output | Low |
| NANDALE | NAND Flash Address Latch Enable | Output | – |
| NANDCLE | NAND Flash Command Latch Enable | Output | – |