35.7.24 MPDDRC Monitor Address High/Low Port x Register

Name: MPDDRC_MADDRx
Offset: 0x64 + x*0x04 [x=0..7]
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
 ADDR_HIGH_PORTx[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
 ADDR_HIGH_PORTx[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 ADDR_LOW_PORTx[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 ADDR_LOW_PORTx[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 31:16 – ADDR_HIGH_PORTx[15:0] Address High on Port x

Address high which defines the interval to be monitored on port x. This address must be programmed according to the memory mapping of the product.

Bits 15:0 – ADDR_LOW_PORTx[15:0] Address Low on Port x

Address low which defines the interval to be monitored on port x. This address must be programmed according to the memory mapping of the product.