32.22.17 PMC Interrupt Mask Register

The following configuration values are valid for all listed bit names of this register:

0: Corresponding interrupt is disabled.

1: Corresponding interrupt is enabled.

Name: PMC_IMR
Offset: 0x006C
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
   XT32KERR  CFDEVMOSCRCSMOSCSELS 
Access WRRR 
Reset 0000 
Bit 15141312111098 
      PCKRDY2PCKRDY1PCKRDY0 
Access RRR 
Reset 000 
Bit 76543210 
     MCKRDY LOCKAMOSCXTS 
Access RRR 
Reset 000 

Bit 21 – XT32KERR 32.768 kHz Crystal Oscillator Error Interrupt Mask

Bit 18 – CFDEV Clock Failure Detector Event Interrupt Mask

Bit 17 – MOSCRCS 12 MHz RC Oscillator Status Interrupt Mask

Bit 16 – MOSCSELS Main Oscillator Clock Source Selection Status Interrupt Mask

Bits 8, 9, 10 – PCKRDYx Programmable Clock Ready x Interrupt Mask

Bit 3 – MCKRDY Main System Bus Clock Ready Interrupt Mask

Bit 1 – LOCKA PLLA Lock Interrupt Mask

Bit 0 – MOSCXTS 8 to 24 MHz Crystal Oscillator Status Interrupt Mask