32.9 Peripheral and Generic Clock Controller

The PMC controls the clocks of the embedded peripherals by means of the Peripheral Control register (PMC_PCR). With this register, the user can enable and disable the different clocks used by the peripherals:

• Peripheral clocks (periph_clk[..]), routed to every peripheral and derived from the Main System Bus clock (MCK), and
• Generic clocks (GCLK[PID]), routed to selected peripherals only (refer to the Peripheral Identifiers table in section Peripherals). These clocks are independent of the core and bus clocks (PCK, MCK and Periph_clk[PID]).

To configure a peripheral’s clocks, PMC_PCR.CMD must be written to ‘1’ and PMC_PCR.PID must be written with the index of the corresponding peripheral.

The GCLK[PID] clocks are generated by selection and division of the following sources: TD_SLCK, MAINCK, UPLLCKDIV, PLLACK, AUDIOCKDIV and MCK. The source clock is selected by writing PMC_PCR.GCKCSS and the source clock divider is configured by writing PMC_PCR.GCKDIV. To apply a clock source selection and division factor, PID, CMD and GCKDIV, GCKCSS must be written in a single operation.

As the Generic Clock Controller (GCLK[PID]) does not implement glitch prevention when switching clocks, the GCLK[PID] must be disabled (PMC_PCR.GCKEN=0) before any configuration change (clock source and prescaler) and must be re-enabled after the change is performed.

The peripheral clock (periph_clk[..]) can be enabled or disabled by writing PMC_PCR.EN.

The user can also enable and disable these clocks by configuring the Peripheral Clock Enable (PMC_PCERx) and Peripheral Clock Disable (PMC_PCDRx) registers. The status of the peripheral clock activity can be read in the Peripheral Clock Status registers (PMC_PCSRx).

When a peripheral or a generic clock is disabled, it is immediately stopped. These clocks are disabled after a reset.

To stop a peripheral clock, the application software must wait until the peripheral has executed its last programmed operation before disabling the clock. This is to avoid data corruption or erroneous behavior of the system.

For a peripheral clock (periph_clk[..]), the bit number in PMC_PCERx, PMC_PCDRx, and PMC_PCSRx is the Peripheral Identifier defined at the product level. The bit number corresponds to the interrupt source number assigned to the peripheral.

To read the current clock configuration of a peripheral, PMC_PCR.CMD must be written to ‘0’ and PMC_PCR.PID must be written with the index of the corresponding peripheral regardless of the values of other fields. This write does not modify the configuration of the peripheral. The PMC_PCR can then be read to know the configuration status of the corresponding PID.