29.6.1 picoPower Processor (pPP)

The picoPower Processor (pPP) is a small processor dedicated to handling the PTC and to processing its data in order to offload the main host Arm processor.

The pPP uses a unified memory architecture where instructions and data share the address space. The pPP embeds a 16 Kbytes SRAM block. When the processor is stopped, the 16 Kbytes SRAM block can be used by the Arm processor.

The pPP has single-cycle access to instructions and data that reside in the SRAM.

Loads and stores go to the local code/data SRAM, the shared mailbox SRAM or the local I/O space.

Accesses to the mailbox enter a wait state for every other access cycle.

Accesses to code/data SRAM and local I/O space never enter wait states.