26.6.2 RTC Mode Register
This register can only be written if the WPEN bit is cleared in the System Controller Write Protection Mode register (SYSC_WPMR).
Name: | RTC_MR |
Offset: | 0x04 |
Reset: | 0x00000000 |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
TPERIOD[1:0] | THIGH[2:0] | ||||||||
Access | R/W | R/W | R/W | R/W | R/W | ||||
Reset | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
OUT1[2:0] | OUT0[2:0] | ||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
HIGHPPM | CORRECTION[6:0] | ||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
NEGPPM | UTC | PERSIAN | HRMOD | ||||||
Access | R/W | R/W | R/W | R/W | |||||
Reset | 0 | 0 | 0 | 0 |
Bits 29:28 – TPERIOD[1:0] Period of the Output Pulse
Value | Name | Description |
---|---|---|
0 | P_1S |
1 second |
1 | P_500MS |
500 ms |
2 | P_250MS |
250 ms |
3 | P_125MS |
125 ms |
Bits 26:24 – THIGH[2:0] High Duration of the Output Pulse
Value | Name | Description |
---|---|---|
0 | H_31MS |
31.2 ms |
1 | H_16MS |
15.6 ms |
2 | H_4MS |
3.91 ms |
3 | H_976US |
976 μs |
4 | H_488US |
488 μs |
5 | H_122US |
122 μs |
6 | H_30US |
30.5 μs |
7 | H_15US |
15.2 μs |
Bits 22:20 – OUT1[2:0] ADC Last Channel Trigger Event Source Selection
Value | Name | Description |
---|---|---|
0 | NO_WAVE |
No waveform, stuck at ‘0’ |
1 | FREQ1HZ |
1 Hz square wave |
2 | FREQ32HZ |
32 Hz square wave |
3 | FREQ64HZ |
64 Hz square wave |
4 | FREQ512HZ |
512 Hz square wave |
5 | ALARM_TOGGLE |
Output toggles when alarm flag rises |
6 | ALARM_FLAG |
Output is a copy of the alarm flag |
7 | PROG_PULSE |
Duty cycle programmable pulse |
Bits 18:16 – OUT0[2:0] All ADC Channel Trigger Event Source Selection
Value | Name | Description |
---|---|---|
0 | NO_WAVE |
No waveform, stuck at ‘0’ |
1 | FREQ1HZ |
1 Hz square wave |
2 | FREQ32HZ |
32 Hz square wave |
3 | FREQ64HZ |
64 Hz square wave |
4 | FREQ512HZ |
512 Hz square wave |
5 | ALARM_TOGGLE |
Output toggles when alarm flag rises |
6 | ALARM_FLAG |
Output is a copy of the alarm flag |
7 | PROG_PULSE |
Duty cycle programmable pulse |
Bit 15 – HIGHPPM HIGH PPM Correction
If the absolute value of the correction to be applied is lower than 30 ppm, it is recommended to clear HIGHPPM. HIGHPPM set to 1 is recommended for 30 ppm correction and above.
Formula:
If HIGHPPM = 0, then the clock frequency correction range is from 1.5 ppm up to 98 ppm. The RTC accuracy is less than 1 ppm for a range correction from 1.5 ppm up to 30 ppm.
The correction field must be programmed according to the required correction in ppm; the formula is as follows:
The value obtained must be rounded to the nearest integer prior to being programmed into CORRECTION field.
If HIGHPPM = 1, then the clock frequency correction range is from 30.5 ppm up to 1950 ppm. The RTC accuracy is less than 1 ppm for a range correction from 30.5 ppm up to 90 ppm.
The correction field must be programmed according to the required correction in ppm; the formula is as follows:
The value obtained must be rounded to the nearest integer prior to be programmed into CORRECTION field.
If NEGPPM is set to 1, the ppm correction is negative (used to correct crystals that are faster than the nominal 32.768 kHz).
Value | Name | Description |
---|---|---|
0 | DISABLED |
Lower range ppm correction with accurate correction (below 30ppm correction). |
1 | ENABLED |
Higher range ppm correction with accurate correction (higher than 30ppm correction). |
Bits 14:8 – CORRECTION[6:0] Slow Clock Correction
Value | Name | Description |
---|---|---|
0 | DISABLED |
No correction |
1–127 | – |
The slow clock will be corrected according to the formula given in HIGHPPM description. |
Bit 4 – NEGPPM Negative PPM Correction
See CORRECTION and HIGHPPM field descriptions.
NEGPPM must be cleared to correct a crystal slower than 32.768 kHz.
Value | Name | Description |
---|---|---|
0 | DISABLED |
Positive correction (the divider will be slightly higher than 32768). |
1 | ENABLED |
Negative correction (the divider will be slightly lower than 32768). |
Bit 2 – UTC UTC Time Format
It is forbidden to write a one to the UTC and PERSIAN bits at the same time.
Value | Name | Description |
---|---|---|
0 | DISABLED |
Gregorian or Persian calendar. |
1 | ENABLED |
UTC format. |
Bit 1 – PERSIAN PERSIAN Calendar
Value | Name | Description |
---|---|---|
0 | DISABLED |
Gregorian calendar. |
1 | ENABLED |
Persian calendar. |
Bit 0 – HRMOD 12-/24-hour Mode
Value | Name | Description |
---|---|---|
0 | 24HOURS | 24-hour mode is selected. |
1 | AMPM | 12-hour mode is selected. |