1 Silicon Issue Summary

In this table and in subsequent sections, the following applies:

Table 1-1. Silicon Issue Summary
Module	Erratum	Affected Device Revisions
Module	Erratum	A0 A0-D1G A0-D2G	A1 A1-D1G A1-D2G
ROM Code	Watchdog not disabled	X	X
ROM Code	Boot failure on e.MMC memories	X	X
SHDWC	Wake-up events are not deactivated	X	X
RTC	RTC_TSTR0 timestamping error	X	X
PMC	Delay to first establish PCK	X	X
PMC	Programmable Clock Output (PCKx) Ready status issue	X	X
PIO	Open drain management limitation	X	X
ADC	Temperature sensor still enabled when stopped without conversion	X	X
ADC	Temperature sensor spurious activation with CH30	X	X
I2SMCC	Time Division Multiplexed Left Justified (TDMLJ) is not functional in Client mode	X	X
SSC	Inverted left/right channels	X	X
SSC	TD output delay	X	X
SECUMOD	Tamper timestamping polarity error	X	X
GMAC	GMAC0 not functional with multiple queues in 10/100 Half Duplex mode	X	X
SDMMC	SDMMC failure when changing speed mode or performing ALL soft reset on the fly	X	X
	GCLK cannot be stopped	X	X
	EXTUN (Execute Tuning) status issue	X	X
	HS400 and HS400-ES modes are not functional	X	X
MCAN	Debug message handling state machine not reset to Idle when CCCR.INIT is set	X	X
TCPC	Signal level detection not functional	X	–