1.6 CCL Manchester Encoder

This example application shows how to use the CCL peripheral library and generate a Manchester-encoded output.

Description

This demonstrates a way to generate a Manchester-encoded output using a SPI port and the CCL. The SPI port is sending out a predefined buffer of data in a circular fashion. Data is sent out LSB first, with CCL_OUT being the Manchester-encoded output. Pins are configured such that a logic analyzer can be attached to see the input (MOSI and SCK) and the output (CCL_OUT) simultaneously.

Downloading and Building the Application

To clone or download this application from Github, go to the main page of this repository and then click Clone button to clone this repository or download as zip file. This content can also be downloaded using content manager by following these instructions.

Path of the application within the repository is apps/ccl/manchester_encoder.

To build the application, refer to the following table and open the project using its IDE.

Project NameDescription
wbz653_curiosity.XMPLABX Project for WBZ653 Curiosity Board

Setting Up the Hardware

The following table shows the target hardware for the application projects.

Project NameDescription
wbz653_curiosity.XWBZ653 Curiosity Board

Setting Up WBZ653 Curiosity Board

  • SCK pin of mikroBUS2 has SCK output.
  • Use jumper to connect SCK pin of mikroBUS1 and MISO pin of mikroBUS1 (This routes SCK signal To CCLIN4).
  • MOSI pin of mikroBUS1 has MOSI output..
  • RA3 (pin 25 of GPIO Header) has CCL output (CCL_OUT1).
  • Connect the Debug USB port on the board to the computer using a micro USB cable.

Running the Application

  1. Connect a logic analyzer to MOSI pin of mikroBUS1.
  2. Connect a logic analyzer to SCK pin of mikroBUS2.
  3. Connect a logic analyzer to RA3 pin of GPIO Header (pin 25 of GPIO Header).
  4. Refer to the following table for pin details:
    BoardMOSI PinSCK PinCCL_OUT Pin
    WBZ653 Curiosity BoardPin 6 of mikroBUS1Pin 4 of mikroBUS2Pin 25 of GPIO Header
  5. Build and Program the application using its IDE.
  6. Observe the output on logic analyzer, it should follow the truth table as shown in the following diagram: