42 Revision History


Doc Rev.	Date	Comments
G	10/2024	Updated reset values for IPR0, IPR3, TMR0H, INTCON: INT3EDG and BAUDxCON: RCIDL. Updated ADSTAT register. Added data sheet clarification AD04 to +-3.0 LSb. Corrected reset value for SMT2WINPPS and SMT2SIGPPS. Other minor editorial corrections.
F	06/2023	Updated PPS input and output tables with all available ports. Updated Electrical Specifications for ADCC AD05 to +-2.5 LSb and I2C D303 to 0.25 VDD for < 2V. Added a note in TMR0 for 8-bit mode operation. Misc. editorial updates.
E	07/2022	Updated the Pin Allocation Table, Electrical Specification chapter, Section 33.1.4, Registers 33.7.3, 33.7.9, 33.7.10; updated TQFP package drawing.
D	12/2017	Updated Cover page Data sheet format and content updated Added characteristic graphs
C	4/2017	Updated Cover page Updated Example 13-1; Figures 6-1 and 11-11; Registers 3-3, 3-6, 19-1, and 27-9; Sections 1.1.2, 4.3, 13.8, 23.5, 27.5.1, 27.10, 32.1.2, and 32.1.6; Tables 4-1, 10-5, 38-11 and 38-15 New Timer 2 chapter Removed Section 4.4.2 and 31.2.3 Added Section 23.5.1.
B	09/2016	Updated Peripheral Module, Memory and Core features descriptions on cover page Updated the PIC18(L)F2X/4XK40 Family Types Table Updated Examples 11-1, 11-3, 11-5 and 11-6; Registers 4-2, 4-5 and 13-18; Sections 1.2, 4.4.1, 4.5, 4.5.4, 17.3, 17.5, 18.1, 18.1.1, and 18.1.1.1; Tables 4-2, 38-5 and 38-14
A	06/2016	Initial document release.