19.14.7 SLRCONx
Important:
- Refer to the “Pin Allocation Table” for details about pin availability per port
- Unimplemented bits will read back
as ‘
0’
| Name: | SLRCONx |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SLRx7 | SLRx6 | SLRx5 | SLRx4 | SLRx3 | SLRx2 | SLRx1 | SLRx0 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bits 0, 1, 2, 3, 4, 5, 6, 7 – SLRxn Slew Rate Control on RX Pin
| Value | Description |
|---|---|
1 |
PORT pin slew rate is limited |
0 |
PORT pin slews at maximum rate |