7.3 8x8 Hardware Multiplier
This device includes an 8x8 hardware multiplier as part of the ALU within the CPU. The multiplier performs an unsigned operation and yields a 16-bit result that is stored in the product register, PROD. The multiplier’s operation does not affect any flags in the STATUS register.
Making multiplication a hardware operation allows it to be completed in a single instruction cycle. This has the advantages of higher computational throughput and reduced code size for multiplication algorithms and allows the device to be used in many applications previously reserved for digital signal processors. A comparison of various hardware and software multiply operations, along with the savings in memory and execution time, is shown in Table 7-2.
Routine | Multiply Method | Program Memory (Words) | Cycles (Max) | Time | |||
---|---|---|---|---|---|---|---|
@ 64 MHz | @ 40 MHz | @ 10 MHz | @ 4 MHz | ||||
8x8 unsigned | Without hardware multiply | 13 | 69 | 4.3 μs | 6.9 μs | 27.6 μs | 69 μs |
Hardware multiply | 1 | 1 | 62.5 ns | 100 ns | 400 ns | 1 μs | |
8x8 signed | Without hardware multiply | 33 | 91 | 5.7 μs | 9.1 μs | 36.4 μs | 91 μs |
Hardware multiply | 6 | 6 | 375 ns | 600 ns | 2.4 μs | 6 μs | |
16x16 unsigned | Without hardware multiply | 21 | 242 | 15.1 μs | 24.2 μs | 96.8 μs | 242 μs |
Hardware multiply | 28 | 28 | 1.8 μs | 2.8 μs | 11.2 μs | 28 μs | |
16x16 signed | Without hardware multiply | 52 | 254 | 15.9 μs | 25.4 μs | 102.6 μs | 254 μs |
Hardware multiply | 35 | 40 | 2.5 μs | 4.0 μs | 16.0 μs | 40 μs |