36.6.3 SPI Status Interrupts

The SPIxIF flag is located in one of the PIR registers. This flag is set when any of the individual status flags in SPIxINTF and their respective SPIxINTE bits are set. For any specific interrupt flag to interrupt normal program flow, both the SPIxIE bit in the PIE register corresponding to the PIR register and the specific bit in SPIxINTE associated with that interrupt must be set.

The Status Interrupts include the following:

  • Shift Register Empty (SRMTIF)
  • Transfer Counter is Zero (TCZIF)
  • Start of Client Select (SOSIF)
  • End of Client Select (EOSIF)
  • Receiver Overflow (RXOIF)
  • Transmitter Underflow (TXUIF)