17.5.2 VREGCON
Voltage Regulator Control Register
| Name: | VREGCON |
| Offset: | 0x048 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PMSYS[1:0] | VREGPM[1:0] | ||||||||
| Access | R | R | R/W | R/W | |||||
| Reset | q | q | 1 | 0 | |||||
Bits 5:4 – PMSYS[1:0] System Power Mode Status
| Value | Description |
|---|---|
| 11 | Regulator in Ultra Low-Power (ULP) mode for extended temperature range is active |
| 10 | Regulator in Ultra Low-Power (ULP) mode is active |
| 01 | Regulator in Low-Power (LP) mode is active |
| 00 | Regulator in High-Power (HP) mode is active |
Bits 1:0 – VREGPM[1:0] Voltage Regulator Power Mode Selection
| Value | Description |
|---|---|
| 11 | Regulator in Ultra Low-Power (ULP) mode. Use ONLY for extended temperature range |
| 10 | Regulator in Ultra Low-Power (ULP) mode (lowest current consumption) |
| 01 | Regulator in Low-Power (LP) mode (faster wake-up from Sleep) |
| 00 | Regulator in High-Power (HP) mode (fastest wake-up from Sleep) |