14.1 Power-on Reset (POR)
The POR circuit holds the device in Reset until VDD has
reached an acceptable level for minimum operation. Slow rising VDD, fast operating speeds
or analog performance may require greater than minimum VDD. The PWRT, BOR or MCLR features can be used to extend the start-up period until
all device operation conditions have been met. The POR bit will be set to ‘0’
if a Power-on Reset has occurred.