1.1.2 UART Bootloader system level execution flow

Basic Bootloader system level execution flow (Cortex-M based MCUs)

• The Bootloader code starts executing on a device Reset

• If there are no conditions to enter the firmware upgrade mode, the Bootloader starts executing the user application

  • Refer to Bootloader Trigger Methods for different conditions to enter firmware upgrade mode

• The Bootloader performs Flash erase/program operations while in the firmware upgrade mode

Fail Safe Update Bootloader system level execution flow (MIPS Based MCUs)

• Bootloader always maps Bank 1 to lower region at boot up irrespective of cause for reset (Hard/Soft).

  • This is required because if Swap bit was set and a soft reset was triggered the value is retained but if Swap bit was set and Hard reset was triggered the value is cleared

• Once Swap bit is cleared and Bank 1 is mapped to lower region it performs below operation

  • If Bank 1 serial number is greater than Bank 2 serial number it just continues for trigger check or runs application from Bank 1, As Bank 1 is already mapped to lower region in above step (Bank 1 is Active Bank)

  • If Bank 2 serial number is greater than Bank 1 serial number it maps Bank 2 to lower region by setting the Swap bit and proceeds to trigger check or runs application from Bank 2 (Bank 2 is Active Bank)

• Whenever Bootlader programs new application in the Inactive bank and swap bank command is received it reads the serial number from Active bank, increments by 1 and then writes to Inactive Bank serial

  • Inactive Bank Serial number = Active Bank serial number + 1

  • Start address of inactive bank is equal start of mid of flash

• If the Host application requests to update the Active Bank and the address falls into the active bank serial sector it sends an error response and aborts the programming operation

MPU Bootloader system level execution flow

• The first stage ROM Bootloader is executed on PoR. The main role of ROM Bootloader is to verify and load secondary program loader (AT91BootStrap) from persistent storage (such as SDMMC, NAND Flash, Serial Flash, QSPI Flash) into internal SRAM and execute it

• The main role of Secondary Program Loader (AT91BootStrap) is to initialize SDRAM, DDR, and load a third stage Harmony 3 Bootloader from persistent storage into DDR and execute it

• If there are no conditions to enter the firmware upgrade mode, the Harmony 3 Bootloader starts executing the user application

  • Refer to Bootloader Trigger Methods for different conditions to enter firmware upgrade mode

• Harmony 3 Bootloader performs the following functions:

  • It loads the harmony application from SD/eMMC/NAND/Serial Flash memory to the DDR memory and executes it

  • It receives new harmony application image over UART channel and writes it to SD/eMMC/NAND/Serial Flash memory

• MPU Bootloader system level execution flow is depicted as below