3 Generating Constant Analog Signal Using 10-Bit DAC

The DAC can be used to generate a constant analog signal. It uses the output of the Voltage Reference (VREF) peripheral as positive reference.

The DAC output ranges from 0V to 1023 × V R E F 1024

VREF can be selected from a list of predefined values:

  • Internal 1.024V reference
  • Internal 2.048V reference
  • Internal 4.096V reference
  • Internal 2.500V reference
  • VDD reference
  • External reference from the VREFA pin (PD7)
Figure 3-1. VREF.DAC0REF Register
For the purpose of this example, the 2.048V reference voltage was selected:
VREF.DAC0REF = VREF_REFSEL_2V048_gc;

A 50 µs delay is recommended after enabling the VREF peripheral.

Figure 3-2. Internal Voltage Reference (VREF) Characteristics
_delay_us(50);

The DAC output can be used internally by other peripherals, or it can be linked to an output pin. For the AVR128DA48, the DAC output is connected to pin PD6 (see the figure below).

Figure 3-3. PORT Function Multiplexing

The DAC output pin needs to have the digital input buffer and the pull-up resistor disabled in order to reduce its load.

PORTD.PIN6CTRL &= ~PORT_ISC_gm;

PORTD.PIN6CTRL |= PORT_ISC_INPUT_DISABLE_gc;

PORTD.PIN6CTRL &= ~PORT_PULLUPEN_bm;

The DACn.DATA register is used to generate a specific analog output voltage. The value of this output voltage can be determined using the following equation:

V O U T = ( D A C n . D A T A × V R E F ) 1024

Writing to the DACn.DATA register at initialization is optional; however, it is useful to make the DAC output a specific voltage from the beginning. The DAC features a 10-bit resolution, therefore, the DACn.DATAL and DACn.DATAH register pair represents the 10-bit value DACn.DATA (see Figure 3-4). The two LSbs [1:0] are accessible at the original offset and the eight MSbs [9:2] can be accessed at offset +1.

The output will be updated after DACn.DATAH is written.

Figure 3-4. DACn.DATA Register

The desired output for the DAC in this example is 1.2V. To achieve this, the following equation is applied:

D A C n . D A T A = ( V O U T × 1024 ) V R E F = ( 1.2 V × 1024 ) 2.048 V = 600 = 0 x 258

In order to enable the DAC, Output Buffer, and Run in Standby mode, use the following code:

DAC0.CTRLA = DAC_ENABLE_bm | DAC_OUTEN_bm | DAC_RUNSTDBY_bm;
Important: If Run in Standby mode is enabled, the DAC will continue to run when the microcontroller is in Standby Sleep mode.

Starting a Conversion

When the DAC is enabled (ENABLE = 1 in DACn.CTRLA), a conversion starts as soon as the Data (DACn.DATA) register is written.

When the DAC is disabled (ENABLE = 0 in DACn.CTRLA), writing to the Data registers does not trigger a conversion. Instead, the conversion starts on writing a ‘1’ to the ENABLE bit in the DACn.CTRLA register.

DAC0.DATAL = (value & (0x03)) << 6;

DAC0.DATAH = value >> 2;

After a conversion, the output keeps its value of D A C n . D A T A × V R E F 1024 until the next conversion, as long as the DAC is running. Any change in the VREF selection will immediately change the DAC output (if enabled and running).

Tip: The full code example is also available in Appendix.