17.7.18 OSC48M Calibration
This register (bits 0 to 21) must be updated with the CAL48M bit field from the NVM Software Calibration Area. Refer to NVM Software Calibration Row Mapping.
| Name: | CAL48M |
| Offset: | 0x38 |
| Reset: | Calibrated value for VDD range 3.6 V to 5.5 V |
| Property: | PAC Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| TCAL[5:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | x | x | x | x | x | x | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| FRANGE[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | x | x | |||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FCAL[5:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | x | x | x | x | x | x | |||