2 Peripheral Overview

The following table shows the peripheral overview of the entire AVR DD Family, but further documentation describes only the AVR64DD14/20 devices.

Table 2-2. Peripheral Overview
Feature

AVR16DD14
AVR32DD14
AVR64DD14

AVR16DD20
AVR32DD20
AVR64DD20

AVR16DD28
AVR32DD28
AVR64DD28

AVR16DD32
AVR32DD32
AVR64DD32

Pins 14 20 28 32
Max. frequency (MHz) 24 24 24 24
16-bit Timer/Counter type A (TCA) 1 1 1 1
16-bit Timer/Counter type B (TCB) 2 2 3 3
12-bit Timer/Counter type D (TCD) 1 1 1 1
Real-Time Counter (RTC) 1 1 1 1
USART 2 2 2 2
SPI 1 1 1 1
TWI/I2C(1) 1(1) 1(1) 1(1) 1(1)
12-bit differential ADC (channels)(2) 1 (7)(2) 1 (13)(2) 1 (19)(2) 1 (23)(2)
10-bit DAC (outputs) 1 (1) 1 (1) 1 (1) 1 (1)
Analog Comparator (AC) 1 1 1 1
Zero-Cross Detector (ZCD) 1 1 1 1
Configurable Custom Logic Look-up Table (CCL LUT) 4 4 4 4
Watchdog Timer (WDT) 1 1 1 1
Event System (EVSYS) channels 6 6 6 6
General Purpose I/O(3) 11/10(3) 17/16(3) 23/22(3) 27/26(3)
PORT

PA[1:0]
PC[3:1]
PD[7:4]
PF[7:6]

PA[7:0]
PC[3:1]
PD[7:4]
PF[7:6]

PA[7:0]
PC[3:0]
PD[7:1]
PF[7,6,1,0]

PA[7:0]
PC[3:0]
PD[7:1]
PF[7:0]

External interrupts 11 17 23 27
CRCSCAN 1 1 1 1
Unified Program and Debug Interface (UPDI) 1 1 1 1
Note:
  1. The TWI/I2C can operate simultaneously as both host and client on different pins.
  2. ADC inputs are available on MVIO pins (PORTC) if the MVIO is disabled in the SYSCFG1.MVSYSCFG fuse setting.
  3. PF6/RESET pin is input only.