2 Hardware Features

The PCIESS is a hard PCI Express protocol stack embedded within every PolarFire device and includes the following important features:

  • PolarFire transceivers for 2.5 and 5.0 Gbps line speeds

  • Native x1, x2, and x4 lane-support PCIe block (down-configurable/down gradable)

  • Root port support for up to two 32-bit or one 64-bit BAR

  • PCI express base specification 1.1- and 2.1-compliant

  • Legacy PCI power management support

  • 64-bit AXI master and slave interface to the FPGA fabric

  • End-to-end data integrity