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Up to 1-GHz Arm® Cortex®-A7, MIPI/LVDS Display, Dual Gigabit Ethernet, Audio and Security
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SAMA7D65
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8
Security and Cryptography Subsystem
8.1
Overview
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Analog Subsystem
6
Image Subsystem
7
Audio Subsystem
8
Security and Cryptography Subsystem
8.1
Overview
8.1.1
Components
8.1.2
Block Diagram
8.1.3
PUF Features
8.2
TrustZone Advanced Encryption Standard Bridge (TZAESB)
8.3
TrustZone AES Bridge Address Space Controller (TZAESBASC)
8.4
TrustZone Address Space Controller (TZC)
8.5
TrustZone Peripheral Manager (TZPM)
8.6
Advanced Encryption Standard (AES)
8.7
Secure Hash Algorithm (SHA)
8.8
Triple Data Encryption Standard (TDES)
8.9
Random Number Generator (TRNG)
8.10
Integrity Check Monitor (ICM)
8.11
Classical Public Key Cryptography Controller (CPKCC)
8.12
Security Module (SECUMOD)
8.13
Physical Unclonable Functions (PUF)
9
Connectivity Subsystem
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
8.1 Overview