Jump to main content
Up to 1-GHz Arm® Cortex®-A7, MIPI/LVDS Display, Dual Gigabit Ethernet, Audio and Security
Search
Product Pages
SAMA7D65
Home
4
System Controller
4.14
Special Function Registers Backup (SFRBU)
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
4.1
Overview
4.2
System Controller Write Protection (SYSCWP)
4.3
General Purpose Backup Registers (GPBR)
4.4
Dual Watchdog Timer (DWDT)
4.5
Reset Controller (RSTC)
4.6
Real-Time Timer (RTT)
4.7
Real-Time Clock (RTC)
4.8
Shutdown Controller (SHDWC)
4.9
Boot Sequence Controller (BSC)
4.10
64-bit Periodic Interval Timer (PIT64B)
4.11
Chip Identifier (CHIPID)
4.12
OTP Memory Controller (OTPC)
4.13
Special Function Registers (SFR)
4.14
Special Function Registers Backup (SFRBU)
4.14.1
Description
4.14.2
Embedded Characteristics
4.14.3
Register Summary
4.15
Slow Clock Controller (SCKC)
4.16
Clock Generator
4.17
Power Management Controller (PMC)
4.18
Parallel Input/Output Controller (PIO)
5
Analog Subsystem
6
Image Subsystem
7
Audio Subsystem
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
4.14 Special Function Registers Backup (SFRBU)
