7.4.6.10 Loop Test

The SPDIFTX and SPDIFRX modules can be functionally tested without affecting the physical external SPDIF lines. When the bit SPDIFRX_MR.LOOPTEST=1, the internal SPDIFRX input is internally driven by the SPDIFTX internal output. Both modules must be driven by their respective peripheral clock and configured in the same way as in normal operating conditions (LOOPTEST=0).