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Up to 1-GHz Arm® Cortex®-A7, MIPI/LVDS Display, Dual Gigabit Ethernet, Audio and Security
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SAMA7D65
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9
Connectivity Subsystem
9.2
Ethernet MAC (GMAC)
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Analog Subsystem
6
Image Subsystem
7
Audio Subsystem
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
9.1
Overview
9.2
Ethernet MAC (GMAC)
9.2.1
Description
9.2.2
Embedded Characteristics
9.2.3
Block Diagram
9.2.4
Signal Interfaces
9.2.5
Product Dependencies
9.2.6
Functional Description
9.2.7
Programming Interface
9.2
Register Summary
9.3
Flexible Serial Communication Controller (FLEXCOM)
9.4
Quad Serial Peripheral Interface (QSPI)
9.5
Secure Digital MultiMedia Card Controller (SDMMC)
9.6
Controller Area Network (MCAN)
9.7
I3C Controller (I3CC)
9.8
Pulse Width Modulation Controller (PWM)
9.9
Timer Counter (TC)
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
9.2 Ethernet MAC (GMAC)
