11.1.8.17 MIPI D-PHY Characteristics
The SAMA7D6 complies with the protocol and electrical specifications of the following standards:
- MIPI Alliance Specification for Display Serial Interface (DSI), Version 1.2
- MIPI Alliance Specification for D-PHY, Version 1.2
| Symbol | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|
| VDDDPHY | Supply voltage range(1) | – | 2.4 | 2.6 | V |
| IDDDPHY | Current consumption(2) |
HS mode, 4 lanes | – | 30.0 | mA |
| tSTART | Start-up time(3) | – | – | 60 | μs |
| High-Speed Characteristics | |||||
| VCMTXDC | Output common mode voltage(2)(3) | – | 150 | 250 | mV |
| VOD | Output differential voltage(2)(3) | – | 140 | 270 | mV |
| VOHHS | Output high voltage(2)(3) | – | – | 360 | mV |
| ZOS | Single-ended output impedance(3) | – | 40 | 62.5 | Ω |
| DZOS | Single-ended output impedance mismatch(3) | – | – | 10 | % |
| fDSICK | MIPI_CLKx output frequency(3) | – | 40 | 750 | MHz |
| Low-Power Characteristics | |||||
| VOH | Single-ended high-level output(3) | – | 1.10 | 1.30 | V |
| VOL | Single-ended low-level output(3) | – | -50 | 50 | mV |
| ZOLP | Single-ended output impedance | – | 110 | – | Ω |
| tRLP / tFLP | 15% to 85% rise time and fall time(3) | CL < 70 pF | – | 25 | ns |
Note:
- This MIPI D-PHY must be powered by the 2.5V regulated output of the VDDOUT25 regulator, which is supplied from VDDIN33.
- Lane load impedance is 80 to 125Ω.
- Simulation data
