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Up to 1-GHz Arm® Cortex®-A7, MIPI/LVDS Display, Dual Gigabit Ethernet, Audio and Security
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SAMA7D65
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7
Audio Subsystem
7.6
Pulse Density Microphone Controller (PDMC)
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Analog Subsystem
6
Image Subsystem
7
Audio Subsystem
7.1
Overview
7.2
Inter-IC Sound Multi-Channel Controller (I2SMCC)
7.3
Synchronous Serial Controller (SSC)
7.4
Sony/Philips Digital Interface Receiver (SPDIFRX)
7.5
Sony/Philips Digital Interface Transmitter (SPDIFTX)
7.6
Pulse Density Microphone Controller (PDMC)
7.6.1
Description
7.6.2
Embedded Characteristics
7.6.3
PDMC Block Diagram
7.6.4
Signal Description
7.6.5
Product Dependencies
7.6.6
Functional Description
7.6.7
Register Summary
7.7
Asynchronous Sample Rate Converter (ASRC)
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
7.6 Pulse Density Microphone Controller (PDMC)
