2.2.2 System Interconnect Overview
The following table shows allowed paths (X).
| UDDRC_P0 | OTP | CPKCC | APB0 | UDDRC_P2 | APB1 | APB2 | APB3 | APB4 | APB[10:7], APB5 | UDDRC_P4 | QSPI0 | QSPI1 | AESB | UDDRC_P1 | APB6 | SRAM_P0 | SRAM_P1 | EBI | NFC_CMD | NFC_RAM | OHCI_EHCI_REGS | USB_RAM | UDDRC_P3 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CA7 | X | X | X | X | – | X | X | X | X | X | – | X | X | X | – | X | X | – | X | X | X | X | X | – |
| OTP | – | – | – | X | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – |
| XDMAC1 | – | – | – | – | X | X | X | X | X | – | – | X | X | X | – | X | – | X | X | – | X | – | – | – |
| XDMAC0 | – | – | – | – | X | X | X | X | X | – | – | X | X | X | – | X | – | X | X | – | X | – | – | – |
| GMAC0 | – | – | – | – | – | – | – | – | – | – | X | X | X | – | – | – | – | X | X | – | – | – | – | – |
| GMAC1 | – | – | – | – | – | – | – | – | – | – | X | X | X | – | – | – | – | X | X | – | – | – | – | – |
| SDMMC0 | – | – | – | – | – | – | – | – | – | – | X | X | X | – | – | – | – | X | X | – | – | – | – | – |
| SDMMC1 | – | – | – | – | – | – | – | – | – | – | X | X | X | – | – | – | – | X | X | – | – | – | – | – |
| SDMMC2 | – | – | – | – | – | – | – | – | – | – | X | X | X | – | – | – | – | X | X | – | – | – | – | – |
| XDMAC2 | – | – | – | – | – | – | – | – | – | – | X | X | X | X | – | – | – | X | X | – | X | – | X | – |
| AXI_AP1 | – | – | – | – | X | X | X | X | X | X | – | X | X | X | – | X | – | X | X | X | X | X | X | – |
| MCAN0 | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | X | – | – | – | – | – | – | – |
| MCAN1 | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | X | – | – | – | – | – | – |
| MCAN2 | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | X | – | – | – | – | – | – | – |
| MCAN3 | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | X | – | – | – | – | – | – |
| MCAN4 | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | X | – | – | – | – | – | – | – |
| ICM | – | – | – | – | – | – | – | – | – | – | – | X | X | – | X | – | X | – | X | – | – | – | – | – |
| UDPHSA_DMA | – | – | – | – | – | – | – | – | – | – | – | – | – | – | X | – | X | – | – | – | – | – | – | – |
| UDPHSB_DMA | – | – | – | – | – | – | – | – | – | – | – | – | – | – | X | – | – | X | – | – | – | – | – | – |
| OHCI_DMA | – | – | – | – | – | – | – | – | – | – | – | – | – | – | X | – | X | – | – | – | – | – | – | – |
| EHCI_DMA | – | – | – | – | – | – | – | – | – | – | – | – | – | – | X | – | – | X | – | – | – | – | – | – |
| TZAESB | – | – | – | – | – | – | – | – | – | – | – | X | X | – | X | – | – | – | X | – | X | – | – | – |
| GPU2DC | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | X |
| LCDC | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | – | X |