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Up to 1-GHz Arm® Cortex®-A7, MIPI/LVDS Display, Dual Gigabit Ethernet, Audio and Security
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SAMA7D65
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2
CPU and Interconnect
2.3
Cortex-A7 Processor (Arm)
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
2.1
Event System
2.2
System Interconnect and Security (SIS)
2.3
Cortex-A7 Processor (Arm)
2.3.1
Description
2.3.2
Embedded Characteristics
2.3.3
Clocks
2.3.4
Power Supplies
2.3.5
Generic Interrupt Controller (GIC)
2.3.6
Media Processing Engine (MPE) with Neon Technology
2.3.7
Debug
2.3.8
Performance Monitoring Unit (PMU)
2.3.9
System Counter and Generic Timer
2.4
External Interrupt Controller (EIC)
2.5
Debug and Test
2.6
NIC-400 Global Programmer’s View (NICGPV)
2.7
Bus Matrix (MATRIX)
2.8
DMA Controller (XDMAC)
2.9
Boot Strategies
3
Memories
4
System Controller
5
Analog Subsystem
6
Image Subsystem
7
Audio Subsystem
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
2.3 Cortex-A7 Processor (Arm)
