3 Appendix A: Revision History

Doc. Rev.DateComments
J06/2025Added Data Sheet Clarifications 2.1 (PPS Input Selection Register Details) and 2.2 (Peripheral PPS Output Selection Codes).
H10/2024Updated document format to most current version; silicon issues renumbered accordingly. Added silicon issue 1.7.2 (TMR0H Register Does Not Increment). Removed existing data sheet clarifications. Other minor editorial updates.
G09/2022Removed 2.1.2. Added 2.1.6, 2.1.7, 2.1.8, 2.4.2, 2.5.3, 2.10.1, 2.11.1, 2.12.1, 2.13.1. Removed all Data Sheet Clarifications except ADC offset Error should be -+3.0 LSb. Other minor editorial corrections.
F03/2021Added silicon revisions 2.1.5, 2.1.6, 2.5.2, 2.6.3 2.8.1 and 2.9.1. Data Sheet Clarifications: Added Module 3.2 (Pin Diagrams), Module 3.3 (Electrical Specifications), Module 3.4 (Analog-to-Digital Converter) and Module 3.5 (Capture/Compare/PWM (CCP) Module).
E06/2018Data Sheet Clarifications: Added Module 2: Pin Allocation Tables (ADC Channel Selection).
D05/2018Added Module 7: Electrical Specifications (FVR) and Module 8: Timer0. Data Sheet Clarifications: Added Module 1 (Core Features).
C03/2017Added Module 6: Electrical Specifications for LF Devices Only. Other minor corrections.
B12/2016Added modules 1.3. ADCRC Oscillator Operation in Sleep, 1.4. ADC Conversion with FVR, and 5. MSSP to the Silicon Errata Issues section. Other minor corrections.
A09/2016Initial release of this document.