39.7.2 ADC - 12-Bit Differential Mode

Figure 39-120. Positive Gain Error vs. VREFA (ADC Differential Mode @60 ksps, VDD = 3.6V)
Figure 39-121. Positive Gain Error vs. Sample Rate (ADC Differential Mode, VREFA = VDD = 3.6V)
Figure 39-122. Negative Gain Error vs. VREFA (ADC Differential Mode @60 ksps, VDD = 3.6V)
Figure 39-123. Negative Gain Error vs. Sample Rate (ADC Differential Mode, VREFA = VDD = 3.6V)
Figure 39-124. Offset Error vs. VREFA (ADC Differential Mode @60 ksps, VDD = 3.6V)
Figure 39-125. Offset Error vs. Sample Rate (ADC Differential Mode, VREFA = VDD = 3.6V)
Figure 39-126. DNL vs. VREFA (ADC Differential Mode @60 ksps, VDD = 3.6V, T = -40°C)
Figure 39-127. DNL vs. VREFA (ADC Differential Mode @60 ksps, VDD = 3.6V, T = 25°C)
Figure 39-128. DNL vs. VREFA (ADC Differential Mode @60 ksps, VDD = 3.6V, T = 85°C)
Figure 39-129. DNL vs. VREFA (ADC Differential Mode @60 ksps, VDD = 3.6V, T = 125°C)
Figure 39-130. INL vs. VREFA (ADC Differential Mode @60 ksps, VDD = 3.6V, T = -40°C)
Figure 39-131. INL vs. VREFA (ADC Differential Mode @60 ksps, VDD = 3.6V, T = 25°C)
Figure 39-132. INL vs. VREFA (ADC Differential Mode @60 ksps, VDD = 3.6V, T = 85°C)
Figure 39-133. INL vs. VREFA (ADC Differential Mode @60 ksps, VDD = 3.6V, T = 125°C)