13.5.2 Voltage Regulator Control Register
| Name: | VREGCTRL |
| Offset: | 0x01 |
| Reset: | 0x00 |
| Property: | Configuration Change Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| HTLLEN | PMODE[2:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bit 4 – HTLLEN High-Temperature Low Leakage Enable
This bit controls whether the current leakage is reduced or not when operating at temperatures above 70°C.
Warning:
- If entering the Standby
sleep mode, this bit must be ‘
0’. - This will only have an effect when PMODE is set to AUTO and must only be used for the Power-Down sleep mode.
- The TWI address match and
CCL wake-up sources must be disabled before writing this bit to
‘
1’.
| Value | Name | Description |
|---|---|---|
| 0 | OFF | High-temperature low leakage disabled(1) |
| 1 | ON | High-temperature low leakage enabled(2,3) |
Bits 2:0 – PMODE[2:0] Power Mode Select
This bit field controls the drive strength of the voltage regulator.
| Value | Name | Description |
|---|---|---|
| 0x0 | AUTO | The regulator will run with maximum performance in active/idle mode unless the 32.768 kHz oscillator source is selected. Power saving in deep sleep modes. |
| 0x1 | FULL | Maximum performance voltage regulator drive strength in all modes. Faster start-up from sleep modes. |
| Other | - | Reserved |