After an interruption in protocol, power loss or system Reset, any two‑wire device can be
protocol reset by clocking SCL until SDA is released by the EEPROM and goes high. The
number of clock cycles until SDA is released by the EEPROM will vary. The software Reset
sequence should not take more than nine dummy clock cycles. Once the software Reset
sequence is complete, new protocol can be sent to the device by sending a Start
condition followed by the protocol. Refer to Figure 5-2 for an
illustration. Figure 5-2. Software Reset
In the event that the device is still non-responsive or remains active on the SDA bus, a
power cycle must be used to reset the device (see Power-Up Requirements
and Reset Behavior).
