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SAMA7G54
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9
Connectivity Subsystem
9.4
Quad Serial Peripheral Interface (QSPI)
9.4.6
Functional Description
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Analog Subsystem
6
Image Subsystem
7
Audio Subsystem
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
9.1
Overview
9.2
Gigabit
Ethernet MAC (GMAC)
9.3
Flexible Serial Communication Controller (FLEXCOM)
9.4
Quad Serial Peripheral Interface (QSPI)
9.4.1
Description
9.4.2
Embedded Characteristics
9.4.3
Block Diagram
9.4.4
Signal Description
9.4.5
Product Dependencies
9.4.6
Functional Description
9.4.6.1
Register Synchronization
9.4.6.2
Updating the QSPI Configuration
9.4.6.3
Serial Clock Phase and Polarity
9.4.6.4
Transfer Delays
9.4.6.5
DLL
9.4.6.6
DQS Delay
9.4.6.7
Pad Calibration
9.4.6.8
Refresh Sequence
9.4.6.9
QSPI SPI Mode
9.4.6.10
QSPI Serial Memory Mode
9.4.6.11
Scrambling/Unscrambling Function
9.4.6.12
Register Write Protection
9.4.6.13
Peripheral Bus Access Errors
9.4.7
Register Summary
9.5
Secure Digital MultiMedia Card Controller (SDMMC)
9.6
Controller Area Network (MCAN)
9.7
Timer Counter (TC)
9.8
Pulse Width Modulation Controller (PWM)
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
9.4.6 Functional Description
