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Up to 1-GHz Arm® Cortex®-A7, MIPI Camera, Dual Ethernet, Audio and Security
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SAMA7G54
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6
Image Subsystem
6.4
Image Sensor Controller (ISC)
6.4.6
Functional Description
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Analog Subsystem
6
Image Subsystem
6.1
Overview
6.2
Camera Serial Interface (CSI)
6.3
CSI-2 Demultiplexer Controller (CSI2DC)
6.4
Image Sensor Controller (ISC)
6.4.1
Description
6.4.2
Embedded Characteristics
6.4.3
ISC Block Diagram and Use Cases
6.4.4
I/O Lines Description
6.4.5
Product Dependencies
6.4.6
Functional Description
6.4.6.1
ISC Clock Management
6.4.6.2
Parallel Interface Timing Description
6.4.6.3
BT.601/656/1120 Embedded Timing Synchronization Operation
6.4.6.4
Parallel Interface External Sensor Connections
6.4.6.5
MIPI Interface Mapping
6.4.6.6
Parallel Front End (PFE) Module
6.4.6.7
Defective Pixel Correction (DPC)
6.4.6.8
Green Disparity Correction (GDC)
6.4.6.9
Black Level Correction (BLC)
6.4.6.10
White Balance (WB) Module
6.4.6.11
Color Filter Array (CFA) Interpolation Module
6.4.6.12
Color Correction (CC) Module
6.4.6.13
Gamma Curve (GAM) Module
6.4.6.14
Scaler Function
6.4.6.15
Color Space Conversion (CSC) Module
6.4.6.16
Contrast, Brightness, Hue and Saturation
6.4.6.17
4:4:4 To 4:2:2 Chrominance Horizontal Subsampler (SUB422) Module
6.4.6.18
4:2:2 To 4:2:0 Chrominance Vertical Subsampler (SUB420) Module
6.4.6.19
Rounding, Limiting and Packing (RLP) Module
6.4.6.20
DMA Interface
6.4.6.21
Histogram Module
6.4.6.22
Register Write Protection
6.4.7
Register Summary
7
Audio Subsystem
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
6.4.6 Functional Description
