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Up to 1-GHz Arm® Cortex®-A7, MIPI Camera, Dual Ethernet, Audio and Security
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SAMA7G54
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5
Analog Subsystem
5.2
Analog-to-Digital Converter (ADC) Controller
5.2.5
Functional Description
5.2.5.13
Enhanced Resolution Mode and Digital Averaging Function
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Analog Subsystem
5.1
Overview
5.2
Analog-to-Digital Converter (ADC) Controller
5.2.1
Description
5.2.2
Embedded Characteristics
5.2.3
Block Diagram
5.2.4
Product Dependencies
5.2.5
Functional Description
5.2.5.1
Analog-to-Digital Conversion
5.2.5.2
ADC Clock
5.2.5.3
ADC Reference Voltage
5.2.5.4
Conversion Resolution
5.2.5.5
Conversion Results
5.2.5.6
Conversion Results Format
5.2.5.7
Conversion Triggers
5.2.5.8
Sleep Mode and Conversion Sequencer
5.2.5.9
Comparison Window
5.2.5.10
Differential and Single-ended Input Modes
5.2.5.11
ADC Timings
5.2.5.12
Temperature Sensor
5.2.5.13
Enhanced Resolution Mode and Digital Averaging Function
5.2.5.13.1
Enhanced Resolution Mode
5.2.5.13.2
Averaging Function Versus Trigger Events
5.2.5.14
Automatic Error Correction
5.2.5.15
Buffer Structure without FIFO
5.2.5.16
Buffer Structure with FIFO
5.2.5.17
Fault Event
5.2.5.18
Register Write Protection
5.2.6
Register Summary
5.3
Analog Comparator Controller (ACC)
6
Image Subsystem
7
Audio Subsystem
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
5.2.5.13 Enhanced Resolution Mode and Digital Averaging Function
