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Up to 1-GHz Arm® Cortex®-A7, MIPI Camera, Dual Ethernet, Audio and Security
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SAMA7G54
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6
Image Subsystem
6.3
CSI-2 Demultiplexer Controller (CSI2DC)
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Analog Subsystem
6
Image Subsystem
6.1
Overview
6.2
Camera Serial Interface (CSI)
6.3
CSI-2 Demultiplexer Controller (CSI2DC)
6.3.1
Description
6.3.2
Embedded Characteristics
6.3.3
Block Diagram
6.3.4
I/O Lines Description
6.3.5
Functional Description
6.3.6
Register Summary
6.4
Image Sensor Controller (ISC)
7
Audio Subsystem
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
6.3 CSI-2 Demultiplexer Controller (CSI2DC)
