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SAMA7G54
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9
Connectivity Subsystem
9.5
Secure Digital MultiMedia Card Controller (SDMMC)
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Analog Subsystem
6
Image Subsystem
7
Audio Subsystem
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
9.1
Overview
9.2
Gigabit
Ethernet MAC (GMAC)
9.3
Flexible Serial Communication Controller (FLEXCOM)
9.4
Quad Serial Peripheral Interface (QSPI)
9.5
Secure Digital MultiMedia Card Controller (SDMMC)
9.5.1
Description
9.5.2
Embedded Characteristics
9.5.3
Embedded Features for SDMMC0/1/2
9.5.4
Reference Documents
9.5.5
Block Diagram
9.5.6
Application Block Diagram
9.5.7
Pin Name List
9.5.8
Product Dependencies
9.5.9
SD/SDIO Operating Mode
9.5.10
e.MMC Operating Mode
9.5.11
SDR104 / HS200 Tuning
9.5.12
I/O Calibration
9.5.13
e.MMC HS400 Timing Mode Selection
9.5.14
Register Summary
9.6
Controller Area Network (MCAN)
9.7
Timer Counter (TC)
9.8
Pulse Width Modulation Controller (PWM)
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
9.5 Secure Digital MultiMedia Card Controller (SDMMC)
